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AIE Adaptive Image Enhancer Series
Real Time Video Processor ICs
BU1572GUW, BU1573KV, BU1574KU
No.09060EBT02
Description BU1572GUW/BU1573KV/BU1574KU is AIE : Adaptive Image Enhancer (image processing technology by ROHM's hardware). Camera video images are optimized for maximum visibility. Features 1) Compatible with image data from QCIF size (176 144) up to WVGA+ size (864 480) 2) Compatible with 80-system CPU bus interface and RGB interface.(BU1572GUW/BU1573KV) 3) Compatible with Input/Output data formats with RGB 5:6:5 and 6:6:6.(BU1572GUW/BU1573KV) 4) Multiple operation modes: Image Enhance, Analysis, Through and Sleep. *1 5) Two selectable register settings: indirect addressing through the 80-system CPU bus interface 2 or the 2-wire serial interface (I C) *2 6) PWM output for image adjustment LCD backlight control. 7) Built-in edge-enhancement and gamma filters. *1: BU1574KU is an analysis mode setting interdiction. *2: BU1574KU becomes only the register set by the two-wire system serial interface. Extra document is prepared separately about each register setup. Please refer to the Development Scheme on page 10. Application Portable media player, Mobile phone, car display, Car navigation system, and portable DVD etc. Lineup
Parameter Supply power source voltage
1.4-1.6(VDDCore) 1.65-3.3(VDDIo) 1.4-1.6(VDDCore) 2.7-3.6(VDDIo) 1.4-1.6(VDDCore) 2.7-3.6(VDDIo)
Input Interface
Supported up to Max WVGA+(864x480) Supported up to Max WVGA+(864x480) Supported up to Max WVGA+(864x480)
Control Interface
I2C BUS (At RGB interface) I2C BUS (At RGB interface) I2C BUS
Output Interface
18bit RGB interface or bus interface 18bit RGB interface or bus interface 8bit YUV=4:2:2 parallel CCIR601 CCIR656
PWM Output
Image adjustment PWM output Image adjustment PWM output image adjustment PWM output
Package
BU1572GUW
VBGA063W050
BU1573KV
VQFP64
BU1574KU
UQFP64
Absolute maximum ratings Parameter Supply power source voltage 1 Supply power source voltage 2 Input voltage Storage temperature range Power dissipation Symbol VDDIO VDD VIN Tstg PD
(Ta=25) Rating -0.3+4.2 -0.3+2.1 -0.3VDDIO+0.3 -40+125 310 *1 Unit V V V mW
Recommended operating range Parameter
Supply power source voltage 1IO Supply power source voltage 2CORE
Symbol VDDIO VDD
Rating 1.653.30(Typ:2.85V) *1 1.401.60(Typ:1.50V) 0VDDIO -20+70 *2
Unit V V V
Input voltage range VIN-VDDIO Operating temperature range Topr
*Please supply power source in order of VDDVDDIO. *1 : BU1573KV and BU1574KU correspond to 2.703.60V(Typ:3.00V) *2 : BU1573KV and BU1574KU correspond to -40+85
*In the case exceeding 25C, 3.1mW should be reduced at the rating 1C. (BU1573KV: 7.5mW / BU1574KU: 7mW should be reduced at the rating.) *1: BU1573KV is 750mW, and BU1574KU is 700mW.
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Electric characteristics (Unless otherwise specified, VDD=1.50V,VDDIO=2.85V,GND=0.0V,Ta=25,fIN=36.0MHz) *1
Parameter Input frequency Operating consumption current Static consumption current Input "H" current Input "L" current Input "H" voltage 1 Input "L" voltage 1 Input "H" voltage 2 Symbol IN IDD1 IDDst IIH IIL VIH1 VIL1 VIH2 MIN. -10 -10 VDDIO 0.8 -0.3 VDDIO 0.85 -0.3 Limits TYP. 24 MAX. 36.0 30 10 10 VDDIO +0.3 VDDIO 0.2 VDDIO +0.3 VDDIO 0.15 VDDIO 0.4 Unit MHz mA A A A V V V
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Condition DCKI (DUTY45%55%) *2 At enhance mode setting (36MHz) At sleep mode setting, input terminal=GND setting VIH=VDDIO VIL=GND Normal input (including input mode of I/O terminal) Normal input (including input mode of I/O terminal) Hysteresis input *3 (RESETB, DCKI, LCDCSBI/SDA, LCDWRBI/SDC, LCDRDBI/I2CDEV0) Hysteresis input *4 (RESETB, DCKI, LCDCSBI/SDA, LCDWRBI/SDC, LCDRDBI/I2CDEV0) Hysteresis input *5 (RESETB, DCKI, LCDCSBI/SDA, LCDWRBI/SDC, LCDRDBI/I2CDEV0) IOH=-1.0mA(DC) (including output mode of I/O terminal) IOL=1.0mA(DC) (including output mode of I/O terminal)
Input "L" voltage 2
VIL2
-
V
Hysteresis voltage width Output "H" voltage Output "L" voltage
Vhys VOH VOL
VDDIO -0.4 0.0
0.7 -
V V V
*1 : VDDIO=3.00V in case of BU1573KV / BU1574KU *2 : CAMCKI in case of BU1574KU *3,*4,*5 : It corresponds with RESETB CAMCKI SDA SDC I2CDEV0 for BU1574KU Block Diagram BU1572GUW/BU1573KV
CAMDI[17:0]
LCDDI[17:0] Color correction
BU1574KU
Color correction
Luminance distinction
Image enhance
LCDDO[17:0]
Luminance distinction
Image enhance
CAMDO[17:0]
LCDRS0/1I LCDCSBI LCDWRBI LCDRDBI SDA SDC
Register
Edge enhancement Gamma control
Register
Edge enhancement Gamma control
I2C interface
PWM control generation
PWMO
SDA SDC
I2C interface
PWM control generation
PWMO
LCDVSI LCDHSI VLDI ENAI DCKI MSEL0/1/2 RESETB
Timing generator
LCDRS0O LCDCSBO LCDWRBO LCDVSO LCDHSO VLDO ENAO DCKO
CAMVSI CAMHSI CAMCKI
Timing generator
CAMVSO CAMHSO CAMCKO
MSEL0/1/2 RESETB
Recommended Application Circuit BU1572GUW/BU1573KV
CPU LCDDATA[17:0] LCDRS/ LCDCSB/ LCDWRB LCDRDB VSYNC/ HSYNC/ DOTCLOCK LCD Controller D[17:0]
BU1574KU
CAMDI[7:0] CAMHSI CAMVSI CAMCKI SDA SDC CAMDO[7:0] CAMDI[7:0] CAMDO[7:0] CAMHSI CAMVSI CAMCKI CAMHSO CAMHSO CAMVSO CAMCKO CAMVSO CAMCKO Image Processing IC
BU1572GUW/BU1573KV LCDDI[17:0] LCDRS0I/ LCDCSBI/ LCDWRBI LCDRDBI LCDVSI/ LCDHSI/ DCKI LCDVSO/ LCDHSO/ DCKO LCDDO[17:0] LCDRS0O/ LCDCSBO/ LCDWRBO
Camera
RS/ CSB/ WRB RDB VSYNC/ HSYNC/ CLK LED Driver
Module
BU1574KU
SDA/SDC
SDA/SDC
PWMO
PWM IN
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Terminal functions (BU1572GUW/BU1573KV)
PIN No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 PIN Name LCDVSI N.C.*2 LCDHSI/ LCDRS01 LCDCSBI/ SDA LCDWRDBI/ SDC LCDRDBI/ I2CDEV0 LCDDI0 LCDDI1 LCDDI2 LCDDI3 LCDDI4 LCDDI5 LCDDI6 LCDDI7 LCDDI8 LCDDI9 LCDDI10 LCDDI11 LCDDI12 LCDDI13 LCDDI14 LCDDI15 LCDDI16 LCDDI17 ENAI VLDI VDDIO DCKI GND VDD MSEL0/ LCDRS0I MSEL1/ LCDRS1I Interface Type *1 TYPE 1 LCDVSI *3 LCDCSBI LCDWRBI LCDRDBI LCDDI0 LCDDI1 LCDDI2 LCDDI3 LCDDI4 LCDDI5 LCDDI6 LCDDI7 LCDDI8 LCDDI9 LCDDI10 LCDDI11 LCDDI12 LCDDI13 LCDDI14 LCDDI15 LCDDI16 LCDDI17 *3 *3 VDDIO DCKI GND VDD LCDRS0I LCDRS1I TYPE 2 LCDVSI LCDHSI SDA SDC I2CDEV0 LCDDI0 LCDDI1 LCDDI2 LCDDI3 LCDDI4 LCDDI5 LCDDI6 LCDDI7 LCDDI8 LCDDI9 LCDDI10 LCDDI11 LCDDI12 LCDDI13 LCDDI14 LCDDI15 LCDDI16 LCDDI17 ENAI VLDI VDDIO DCKI GND VDD MSEL0 *3 MSEL1 *3 In/Out In In In/Out In In In/Out In/Out In/Out In/Out In/Out In/Out In/Out In/Out In/Out In/Out In/Out In/Out In/Out In/Out In/Out In/Out In/Out In/Out In In In In In Active Level * * Low/ DATA Low/ CLK Low/ * DATA DATA DATA DATA DATA DATA DATA DATA DATA DATA DATA DATA DATA DATA DATA DATA DATA DATA * * PWR CLK GND PWR * Init In In In In In In In In In In In In In In In In In In In Description Vertical timing input Horizontal timing input/ Register select input signal 0 Chip select input signal / In/output serial data Write enable input signal / In/output serial clock Read enable input signal / I2C device address setting Data input: Data input: Data input: Data input: Data input: Data input: Data input: Data input: Data input: Data input: Data input: Data input: Data input: Data input: Data input: Data input: Data input: Data input: bit 0 bit 1 bit 2 bit 3 bit 4 bit 5 bit 6 bit 7 bit 8 bit 9 bit 10 bit 11 bit 12 bit 13 bit 14 bit 15 bit 16 bit 17
Technical Note
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In/output type C *1 C *1 G D *1 D *1 H *1 H *1 H *1 H *1 H *1 H *1 H *1 H *1 H *1 H *1 H *1 H *1 H *1 H *1 H *1 H *1 H *1 H *1 C *1 C *1 D *1 A A
RAM write enable input signal VLD input signal DIGITAL IO power source Clock input Common GROUND CORE power source Mode select 0/ Register select input signal 0 Mode select 1/ Register select input signal 1
*
Change by setup by the register is possible for the "*" display in the column of an Active level. Moreover, Init is a pin state under reset. *1 : It suspends during reset (initial state) *2 : With no ball(Please connect it with GND for BU1573KV) *3 : Please connect with GND.
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Technical Note
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PIN No. 33 34
PIN Name MSEL2 LCDRS0O/ PWMO1 *5 PWMO3 *5/ VLDO ENAO LCDDO17/ PWMO2 *5 LCDDO16 LCDDO15 LCDDO14 LCDDO13 LCDDO12 LCDDO11 LCDDO10 LCDDO9 LCDDO8 GND LCDDO7 LCDDO6 LCDDO5 LCDDO4 LCDDO3 LCDDO2 LCDDO1 LCDDO0 LCDWRBO/ I2CDEV6B LCDCSBO SDA / LCDHSO SDC/ LCDVSO RESETB VDDIO DCKO GND VDD
Interface Type *1 TYPE 1 MSEL2 *3 LCDRS0O/ PWM_O(1) PWM_O(3) LCDDO17/ PWM_O(2) LCDDO16 LCDDO15 LCDDO14 LCDDO13 LCDDO12 LCDDO11 LCDDO10 LCDDO9 LCDDO8 GND LCDDO7 LCDDO6 LCDDO5 LCDDO4 LCDDO3 LCDDO2 LCDDO1 LCDDO0 LCDWRBO LCDCSBO TYPE 2 MSEL2 *4 PWM_O(1) PWM_O(3)/ VLDO ENAO LCDDO17/ PWM_O(2) LCDDO16 LCDDO15 LCDDO14 LCDDO13 LCDDO12 LCDDO11 LCDDO10 LCDDO9 LCDDO8 GND LCDDO7 LCDDO6 LCDDO5 LCDDO4 LCDDO3 LCDDO2 LCDDO1 LCDDO0 I2CDEV6B *3 "H" *6 LCDHSO
In/Out In Out
Active Level * *
Init Low
Description Mode select 2 Register select output signal 0/ PWM output for the LCD backlight PWM output for the LCD backlight/ VLD output signal RAM write enable output signal Data output: bit 17/ PWM output for the LCD backlight Data output: Data output: Data output: Data output: Data output: Data output: Data output: Data output: Data output: bit 16 bit 15 bit 14 bit 13 bit 12 bit 11 bit 10 bit 9 bit 8
In/output type A E
35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58
Out Out In/Out In/Out In/Out In/Out In/Out In/Out In/Out In/Out In/Out In/Out In/Out In/Out In/Out In/Out In/Out In/Out In/Out In/Out In/Out Out Out
* * DATA DATA DATA DATA DATA DATA DATA DATA DATA DATA GND DATA DATA DATA DATA DATA DATA DATA DATA * * *
Low Low Low Low Low Low Low Low Low Low Low Low Low Low Low Low Low Low Low Low High/ In High Low
E E F F F F F F F F F F F F F F F F F F F E G
Common GROUND Data output: Data output: Data output: Data output: Data output: Data output: Data output: Data output: bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0
Write enable output signal Chip select output signal In/output serial clock/ Horizontal timing output signal In/output serial clock/ Vertical timing output signal System reset signal DIGITAL IO power source Clock output Common GROUND CORE power source
59 60 61 62 63 64
RESETB VDDIO DCKO GND VDD
LCDVSO RESETB VDDIO DCKO GND VDD
Out In Out -
* Low PWR CLK GND PWR
Low Low -
G B E -
Change by setup by the register is possible for the "*" display in the column of an Active level. Moreover, Init is a pin state under reset. *3 : Please connect with GND *4 : Please connect with VDDIO *5 : It selects it according to PWMCNT register (40h). *6 : "High"output
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Terminal functions (BU1574KU) PIN No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 PIN Name CAMVSI N.C. *2 CAMHSI SDA SDC I2CDEV0 CAMDI0 CAMDI1 CAMDI2 CAMDI3 CAMDI4 CAMDI5 CAMDI6 CAMDI7 RESERVEI0 *3 RESERVEI1 *3 RESERVEI2 *3 RESERVEI3 *3 RESERVEI4 *3 RESERVEI5 *3 RESERVEI6 *3 RESERVEI7 *3 RESERVEI8 *3 RESERVEI9 *3 RESERVEI10 *3 RESERVEI11 *3 VDDIO CAMCKI GND VDD MSEL0 *3 MSEL1 *3 In/ Out In In In/Out In In In In In In In In In In In In In In In In In In In In In In In In In Active Level * * * DATA CLK * DATA DATA DATA DATA DATA DATA DATA DATA * * * * * * * * * * * * PWR CLK GND PWR * * Init In Descriptions Vertical timing input Horizontal timing input In/Output serial data In/Output serial clock I2C device address setting Data input: bit 0 Data input: bit 1 Data input: bit 2 Data input: bit 3 Data input: bit 4 Data input: bit 5 Data input: bit 6 Data input: bit 7 RESERVE RESERVE RESERVE RESERVE RESERVE RESERVE RESERVE RESERVE RESERVE RESERVE RESERVE RESERVE DIGITAL IO power source Clock input Common GROUND CORE power source Mode select 0 Mode select 1
Technical Note
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In/Output type C *1 C *1 G D *1 D *1 H *1 H *1 H *1 H *1 H *1 H *1 H *1 H *1 C *1 C *1 C *1 C *1 C *1 C *1 C *1 C *1 C *1 C *1 C *1 C *1 D *1 A A
Change by setup by the register is possible for the "*" display in the column of an Active level. Moreover, Init is a pin state under reset. *1 : It suspends during reset (initial state) *2 : Please connect with GND *3 : Please connect with GND.
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Technical Note
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PIN No. 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64
PIN Name MSEL2 *4 PWMO RESERVEO11 *5 RESERVEO10 *5 RESERVEO9 *5 RESERVEO8 *5 RESERVEO7 *5 RESERVEO6 *5 RESERVEO5 *5 RESERVEO4 *5 RESERVEO3 *5 RESERVEO2 *5 RESERVEO1 *5 RESERVEO0 *5 GND CAMDO7 CAMDO6 CAMDO5 CAMDO4 CAMDO3 CAMDO2 CAMDO1 CAMDO0 I2CDEV6B *3 RESERVEO12 *5 CAMHSO CAMVSO RESETB VDDIO CAMCKO GND VDD
In/Out In Out Out Out Out Out Out Out Out Out Out Out Out Out Out Out Out Out Out Out Out Out In Out Out Out In Out -
Active Level * * * * * * * * * * * * * * GND DATA DATA DATA DATA DATA DATA DATA DATA * * * * Low PWR CLK GND PWR
Init Low Low Low Low Low Low Low Low Low Low Low Low Low Low Low Low Low Low Low Low Low High Low Low Low -
Descriptions Mode select 2 PWM output for LCD backlight RESERVE RESERVE RESERVE RESERVE RESERVE RESERVE RESERVE RESERVE RESERVE RESERVE RESERVE RESERVE Common GROUND Data output: bit 7 Data output: bit 6 Data output: bit 5 Data output: bit 4 Data output: bit 3 Data output: bit 2 Data output: bit 1 Data output: bit 0 RESERVE RESERVE Horizontal timing output signal Vertical timing output signal System reset signal DIGITAL IO power source Clock output Common GROUND CORE power source
In/Output type A E E E E E E E E E E E E E E E E E E E E E A E E E B E -
Change by setup by the register is possible for the "*" display in the column of an Active level. Moreover, Init is a pin state under reset. *3 : Please connect with GND *4 : Please connect with VDDIO *5 : Please leave OPEN
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Equivalent Circuit Structures of input / output pins
Type The equivalent circuit structure
VDDIO VDDIO VDDIO
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Type
The equivalent circuit structure
A
To internal
B
To internal
GND GND GND
Input pin
Input pin with the hysteresis function
VDDIO Internal signal VDDIO
VDDIO
C
D
To internal
GND Internal signal Internal signal GND GND
Input pin with the suspend function
Input pin with the hysteresis and suspend functions
VDDIO VDDIO VDDIO To internal Internal signal
VDDIO
VDDIO
E
Internal signal
F
GND Internal signal
GND
GND
Internal signal GND GND
Output pin
VDDIO VDDIO To internal Internal signal
In/output pin
VDDIO Internal signal VDDIO Internal signal To internal VDDIO Internal signal
G
H
Internal signal
Internal signal GND GND GND GND Internal signal
In/output pin with the hysteresis function
In/output pin with the suspend function
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Terminal Layout BU1572GUW
H
17 LCDDI10 18 LCDDI11 22 LCDDI15 24 LCDDI17 27 VDDIO 29 GND 31 MSEL0/ LCDRS01 33 MSEL2
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
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Bottom View
(BU1573KV/BU1574KU Top View)
G
15 LCDDI8 16 LCDDI9 20 LCDDI13 21 LCDDI14 25 ENAI 30 VDD 32 MSEL1/ LCDRS1I 34 LCDRS0O/ PWMO1
1 2 3
F
13 LCDDI6 14 LCDDI7 19 LCDDI12 23 LCDDI16 26 VLDI 35 PWMO3/ VLDO 36 ENAO 38 LCDDO1 6
4 5 6 7
E
11 LCDDI4 9 LCDDI2 10 LCDDI3 12 LCDDI5 28 DCKI 39 37 40 LCDDO1 LCDDO17/ LCDDO1 5 4 PWMO2
VQFP64 UQFP64
(BU1573KV)
8 9 10
D
8 LCDDI1 5 LCDWRBI/ SDC 7 LCDDI0 60 RESETB 44 LCDDO1 0 42 LCDDO1 2 41 LCDDO1 3 43 LCDDO1 1
11 12 13
(BU1574KU)
C
6 4 3 LCDDRBI/ LCDCSBI/ LCDHSI/ I2CDEV0 SDA LCDRS01 58 55 SDA/ LCDDO0 LCDHSO 51 LCDDO4 46 LCDDO8 45 LCDDO9
14 15 16
B
64 VDD 62 DCKO 57 LCDCSB O 53 LCDCSB O 52 LCDDO3 48 LCDDO7 47 GND
A
1 LCDVSI 63 GND 61 VDDIO 59 56 54 SDC/ LCDWRBO/ LCDDO1 LCDVSO I2CDEV6B 50 LCDDO5 49 LCDDO6
1
2
3
4
5
6
7
8
The terminal arrangement follows terminal function table of P.3-6.
Timing Chart 1. I2C interface 1.1 I2C interface timing
SDA
tSU;DAT
tLOW
tHD;ST
tBUF
SDC
tHD;STA tHD;DAT tHIGH
tSU;STA
tSU;STO
Table 1.1-1
Symbol fSCL tHD;STA fLOW tHIGH tSU;STA tHD;DAT tSU;DAT tSU;STO tBUF SDC Clock Frequency Hold-time(repetition)STARTconditions Parameter
I2C Interface timing
MIN. 0 0.6 1.3 0.6 0.6 0 100 0.6 1.3 TYP. MAX. 400 Unit kHz us us us us us ns us us
(The first clock pulse is generated after this period.) The "L" period of SDC clock The "H" period of SDC clock Setup time of repetitive STARTconditions Hold time of SDA Setup time of SDA Setup time of the STOPconditions Bus free time between STOP conditions and the START conditions
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2. RGB interface
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2.1. RGB interface timing The input timing of image signal on RGB I/F is shown in Table 2.1-1.
LCDVSI LCDHSI LCDDI0 LCDDI17 DCKI (CKPOL="0") DCKI (CKPOL="1") tDH
Table 2.1-1
Symbol tDS tDH
BU1572GUW/BU1573KV
Explanation
RGB interface input timing
MIN. 8 8 TYP. MAX - UN
Camera setup period (between the DCKI rising and falling edges) Camera holding period (between the DCKI rising and falling edges)
ns ns
tDS
The output timing of image signal on RGB I/F is shown in Table 2.1-2.
Table 2.1-2
tDCLK DCKO LCDVSO LCDHSO tOCD tOCD dDCLK tODD LCDDO [17:0] tODD tOCD Clock Duty Decision of LCDDO from DCKO
Decision of LCDVSO or LCDHSO from DCKO
BU1572GUW/BU1573KV Image signal output timing
Explanation MIN. 27.7 40 TYP. 50 MAX. 60 5 5 UNIT ns % ns ns
Symbol tDCLK Clock Cycle
3.
YUV interface
3.1. YUV interface timing The input timing of image signal on YUV I/F is shown in Table 3.1-1.
Table 3.1-1
CAMVSI CAMHSI CAMDI0 CAMDI7 CAMCKI (CKPOL="1") CAMCKI (CKPOL="0") tDH Symbol tDS tDH Explanation Camera setup period (between the CAMCKI rising and falling edges) Camera holding period (between the CAMCKI rising and falling edges) MIN. 8 8 TYP MAX - UNI ns ns
BU1574KU
YUV interface input timing
tDS
The output timing of image signal on YUV I/F is shown in Table 3.1-2.
Table 3.1-2
tPCLK CAMCKO CAMVSO CAMHSO tOCD tOCD tODD CAMDO[7:0] tOCD
Decision of CAMVSO or CAMHSO from CAMCKO
BU1574KU Image signal output timing
Explanation MIN. 27.7 40 TYP. 50 MAX. 60 5 5 UNIT ns % ns ns
Symbol tPCLK dPCLK tODD Clock Cycle Clock Duty
Decision of CAMDO from CAMCKO
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Development Scheme
Technical Note
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This technical note is aimed at trying the connectivity in the hardware between customer's system and our AIE Adaptive Image Enhancer series. We prepare various data and tools for every development STEP as follows other than this technical note, please contact the sales staff in your duty also including the support system. (1) Demonstration STEP (You can try the standard image processing functions by the standard Demonstration kit at once.) You can confirm on TV screen what carried out AIE processing of a camera image and the DVD video image. Standard Demonstration board kit Demonstration board(TV-INBU1573KVTV-OUT board) Demonstration board operation manual Demonstration software If the software for the trial board is installed in your Windows PC(Windows 2000/XP), more detailed setting is possible. USB cable (2) Confirmation STEP (We will respond to customer's camera module.) Specifications We will provide specifications for AIE Adaptive Image Enhancer according to customer's requirements. Function explanation We will deliver you the function explanation describing detailed functions, register settings, external interfaces, timing, and so forth of AIE Adaptive Image Enhancer according to your requests. Application note We will deliver you the detailed explanation data on application development of AIE Adaptive Image Enhancer according to your requests. (3) System check STEP (You can check the application operation as a system by the kit of system check tools and your camera module.) You can check the interface with your camera module and the application operation on the system check board using the tools for user's only. System check tools kit Board for system evaluation Manual for system evaluation Macro command file for reference *You can check the detailed functions of the application operation by your PC using the macro command file. (4) Integrated check STEP with user's system (You can check the application operation as a system on your system check board using the integrated check software.) You can check the application operation on the sample LSI-equipped system check board by your camera module using the integrated check software. On line SupportWe will answer your questions about the software development. Cautions on use (1) Absolute Maximum Ratings
An excess in the absolute maximum ratings, such as supply voltage, temperature range of operating conditions, etc., can break down devices, thus making impossible to identify breaking mode such as a short circuit or an open circuit. If any special mode exceeding the absolute maximum ratings is assumed, consideration should be given to take physical safety measures including the use of fuses, etc.
(2) Operating conditions
These conditions represent a range within which characteristics can be provided approximately as expected. The electrical characteristics are guaranteed under the conditions of each parameter.
(3) Reverse connection of power supply connector
The reverse connection of power supply connector can break down ICs. Take protective measures against the breakdown due to the reverse connection, such as mounting an external diode between the power supply and the IC's power supply terminal.
(4) Power supply line
Design PCB pattern to provide low impedance for the wiring between the power supply and the GND lines. In this regard, for the digital block power supply and the analog block power supply, even though these power supplies has the same level of potential, separate the power supply pattern for the digital block from that for the analog block, thus suppressing the diffraction of digital noises to the analog block power supply resulting from impedance common to the wiring patterns. For the GND line, give consideration to design the patterns in a similar manner. Furthermore, for all power supply terminals to ICs, mount a capacitor between the power supply and the GND terminal. At the same time, in order to use an electrolytic capacitor, thoroughly check to be sure the characteristics of the capacitor to be used present no problem including the occurrence of capacity dropout at a low temperature, thus determining the constant.
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(5)GND voltage
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Make setting of the potential of the GND terminal so that it will be maintained at the minimum in any operating state. Furthermore, check to be sure no terminals are at a potential lower than the GND voltage including an actual electric transient.
(6)Short circuit between terminals and erroneous mounting
In order to mount ICs on a set PCB, pay thorough attention to the direction and offset of the ICs. Erroneous mounting can break down the ICs. Furthermore, if a short circuit occurs due to foreign matters entering between terminals or between the terminal and the power supply or the GND terminal, the ICs can break down.
(7)Operation in strong electromagnetic field
Be noted that using ICs in the strong electromagnetic field can malfunction them.
(8)Inspection with set PCB
On the inspection with the set PCB, if a capacitor is connected to a low-impedance IC terminal, the IC can suffer stress. Therefore, be sure to discharge from the set PCB by each process. Furthermore, in order to mount or dismount the set PCB to/from the jig for the inspection process, be sure to turn OFF the power supply and then mount the set PCB to the jig. After the completion of the inspection, be sure to turn OFF the power supply and then dismount it from the jig. In addition, for protection against static electricity, establish a ground for the assembly process and pay thorough attention to the transportation and the storage of the set PCB.
(9)Input terminals
In terms of the construction of IC, parasitic elements are inevitably formed in relation to potential. The operation of the parasitic element can cause interference with circuit operation, thus resulting in a malfunction and then breakdown of the input terminal. Therefore, pay thorough attention not to handle the input terminals, such as to apply to the input terminals a voltage lower than the GND respectively, so that any parasitic element will operate. Furthermore, do not apply a voltage to the input terminals when no power supply voltage is applied to the IC. In addition, even if the power supply voltage is applied, apply to the input terminals a voltage lower than the power supply voltage or within the guaranteed value of electrical characteristics.
(10)Ground wiring pattern
If small-signal GND and large-current GND are provided, It will be recommended to separate the large-current GND pattern from the small-signal GND pattern and establish a single ground at the reference point of the set PCB so that resistance to the wiring pattern and voltage fluctuations due to a large current will cause no fluctuations in voltages of the small-signal GND. Pay attention not to cause fluctuations in the GND wiring pattern of external parts as well.
(11)External capacitor
In order to use a ceramic capacitor as the external capacitor, determine the constant with consideration given to a degradation in the nominal capacitance due to DC bias and changes in the capacitance due to temperature, etc.
Order Model Name Selection
B
U
1
5
7
2
GUW
Package type GUW: VBGA063W050 KV: VQFP64 KU: UQFP64
E
2
ROHM model name
Product number
Taping model name E2: Embossed reel tape None: Tray
Tape and Reel information
VBGA063W050

Tape Quantity Direction of feed Embossed carrier tape (With dry pack) 2500pcs E2
(The direction is the 1pin of product is at the upper left when you hold reel on the left hand and you pull out the tape on the right hand.)
1234
1234
1234
1234
1234
1234
Reel
1Pin
Direction of feed
(Unit:mm)
When you order , please order in times the amount of package quantity.
www.rohm.com (c) 2009 ROHM Co., Ltd. All rights reserved.
11/12
2009.04- Rev.B
BU1572GUW, BU1573KV, BU1574KU
VQFP64

12.0 0.2 10.0 0.1
48 33
Technical Note
www..com

Container Quantity
0.5 0.15 1.0 0.2
32
Tray(with dry pack) 1000pcs Direction of product is fixed in a tray.
12.0 0.2 10.0 0.1
49
Direction of feed
64 1
17
1.6Max. 1.4 0.05 0.1 0.05
0.5 0.1 0.2 +0.05 -0.04
4 +6 -4 0.08 S

0.08 M
(Unit:mm)
1pin
1.25
16
1.25
0.145 +0.05 -0.03
When you order , please order in times the amount of package quantity.
UQFP64

9.0 0.2 7.0 0.1

Container Quantity
32
Tray(with dry pack) 1000pcs Direction of product is fixed in a tray.
9.0 0.2 7.0 0.1
49
64
17 1 16
1.4 0.05 0.1 0.05
0.5
1.6Max.
0.145 +0.05 -0.03 4 +6 -4 0.08
0.5 0.15 1.0 0.2
48
33
Direction of feed
0.5
0.4 0.17 +0.05 -0.03
0.08 M
(Unit:mm)
When you order , please order in times the amount of package quantity.
www.rohm.com (c) 2009 ROHM Co., Ltd. All rights reserved.
1pin
12/12
2009.04- Rev.B
Notice
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Notes
No copying or reproduction of this document, in part or in whole, is permitted without the consent of ROHM Co.,Ltd. The content specified herein is subject to change for improvement without notice. The content specified herein is for the purpose of introducing ROHM's products (hereinafter "Products"). If you wish to use any such Product, please be sure to refer to the specifications, which can be obtained from ROHM upon request. Examples of application circuits, circuit constants and any other information contained herein illustrate the standard usage and operations of the Products. The peripheral conditions must be taken into account when designing circuits for mass production. Great care was taken in ensuring the accuracy of the information specified in this document. However, should you incur any damage arising from any inaccuracy or misprint of such information, ROHM shall bear no responsibility for such damage. The technical information specified herein is intended only to show the typical functions of and examples of application circuits for the Products. ROHM does not grant you, explicitly or implicitly, any license to use or exercise intellectual property or other rights held by ROHM and other parties. ROHM shall bear no responsibility whatsoever for any dispute arising from the use of such technical information. The Products specified in this document are intended to be used with general-use electronic equipment or devices (such as audio visual equipment, office-automation equipment, communication devices, electronic appliances and amusement devices). The Products specified in this document are not designed to be radiation tolerant. While ROHM always makes efforts to enhance the quality and reliability of its Products, a Product may fail or malfunction for a variety of reasons. Please be sure to implement in your equipment using the Products safety measures to guard against the possibility of physical injury, fire or any other damage caused in the event of the failure of any Product, such as derating, redundancy, fire control and fail-safe designs. ROHM shall bear no responsibility whatsoever for your use of any Product outside of the prescribed scope or not in accordance with the instruction manual. The Products are not designed or manufactured to be used with any equipment, device or system which requires an extremely high level of reliability the failure or malfunction of which may result in a direct threat to human life or create a risk of human injury (such as a medical instrument, transportation equipment, aerospace machinery, nuclear-reactor controller, fuel-controller or other safety device). ROHM shall bear no responsibility in any way for use of any of the Products for the above special purposes. If a Product is intended to be used for any such special purpose, please contact a ROHM sales representative before purchasing. If you intend to export or ship overseas any Product or technology specified herein that may be controlled under the Foreign Exchange and the Foreign Trade Law, you will be required to obtain a license or permit under the Law.
Thank you for your accessing to ROHM product informations. More detail product informations and catalogs are available, please contact us.
ROHM Customer Support System
http://www.rohm.com/contact/
www.rohm.com (c) 2009 ROHM Co., Ltd. All rights reserved.
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